Add patched version of esp_eth_mac_w5500.c
This commit is contained in:
Julian Metzler
parent
9a29a6fbd8
commit
d8392b6932
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IMPORTANT: If you're using ESP-IDF v4.3.0 or older, you need to replade the file components/esp_eth/src/esp_eth_mac_w5500.c with the one in this repository.
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It contains patches for SPI communication. WIthout these, once the link is up, unplugging the ethernet cable will cause the program to crash.
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// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include <string.h>
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#include <stdlib.h>
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#include <sys/cdefs.h>
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#include "driver/gpio.h"
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#include "driver/spi_master.h"
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#include "esp_attr.h"
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#include "esp_log.h"
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#include "esp_eth.h"
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#include "esp_system.h"
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#include "esp_intr_alloc.h"
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#include "esp_heap_caps.h"
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#include "esp_rom_gpio.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "freertos/semphr.h"
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#include "hal/cpu_hal.h"
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#include "w5500.h"
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#include "sdkconfig.h"
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static const char *TAG = "w5500-mac";
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#define MAC_CHECK(a, str, goto_tag, ret_value, ...) \
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do { \
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if (!(a)) { \
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ESP_LOGE(TAG, "%s(%d): " str, __FUNCTION__, __LINE__, ##__VA_ARGS__); \
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ret = ret_value; \
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goto goto_tag; \
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} \
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} while (0)
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#define W5500_SPI_LOCK_TIMEOUT_MS (50)
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#define W5500_TX_MEM_SIZE (0x4000)
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#define W5500_RX_MEM_SIZE (0x4000)
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typedef struct {
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esp_eth_mac_t parent;
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esp_eth_mediator_t *eth;
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spi_device_handle_t spi_hdl;
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SemaphoreHandle_t spi_lock;
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TaskHandle_t rx_task_hdl;
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uint32_t sw_reset_timeout_ms;
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int int_gpio_num;
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uint8_t addr[6];
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bool packets_remain;
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} emac_w5500_t;
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static inline bool w5500_lock(emac_w5500_t *emac)
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{
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return xSemaphoreTake(emac->spi_lock, pdMS_TO_TICKS(W5500_SPI_LOCK_TIMEOUT_MS)) == pdTRUE;
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}
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static inline bool w5500_unlock(emac_w5500_t *emac)
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{
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return xSemaphoreGive(emac->spi_lock) == pdTRUE;
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}
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static esp_err_t w5500_write(emac_w5500_t *emac, uint32_t address, const void *value, uint32_t len)
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{
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esp_err_t ret = ESP_OK;
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spi_transaction_t trans = {
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.cmd = (address >> W5500_ADDR_OFFSET),
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.addr = ((address & 0xFFFF) | (W5500_ACCESS_MODE_WRITE << W5500_RWB_OFFSET) | W5500_SPI_OP_MODE_VDM),
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.length = 8 * len,
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.tx_buffer = value
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};
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if (w5500_lock(emac)) {
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if (spi_device_polling_transmit(emac->spi_hdl, &trans) != ESP_OK) {
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ESP_LOGE(TAG, "%s(%d): spi transmit failed", __FUNCTION__, __LINE__);
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ret = ESP_FAIL;
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}
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w5500_unlock(emac);
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} else {
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ret = ESP_ERR_TIMEOUT;
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}
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return ret;
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}
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static esp_err_t w5500_read(emac_w5500_t *emac, uint32_t address, void *value, uint32_t len)
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{
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esp_err_t ret = ESP_OK;
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spi_transaction_t trans = {
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.flags = len <= 4 ? SPI_TRANS_USE_RXDATA : 0, // use direct reads for registers to prevent overwrites by 4-byte boundary writes
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.cmd = (address >> W5500_ADDR_OFFSET),
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.addr = ((address & 0xFFFF) | (W5500_ACCESS_MODE_READ << W5500_RWB_OFFSET) | W5500_SPI_OP_MODE_VDM),
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.length = 8 * len,
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.rx_buffer = value
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};
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if (w5500_lock(emac)) {
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if (spi_device_polling_transmit(emac->spi_hdl, &trans) != ESP_OK) {
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ESP_LOGE(TAG, "%s(%d): spi transmit failed", __FUNCTION__, __LINE__);
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ret = ESP_FAIL;
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}
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w5500_unlock(emac);
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} else {
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ret = ESP_ERR_TIMEOUT;
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}
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if ((trans.flags&SPI_TRANS_USE_RXDATA) && len <= 4) {
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memcpy(value, trans.rx_data, len); // copy register values to output
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}
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return ret;
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}
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static esp_err_t w5500_send_command(emac_w5500_t *emac, uint8_t command, uint32_t timeout_ms)
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{
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esp_err_t ret = ESP_OK;
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MAC_CHECK(w5500_write(emac, W5500_REG_SOCK_CR(0), &command, sizeof(command)) == ESP_OK, "write SCR failed", err, ESP_FAIL);
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// after W5500 accepts the command, the command register will be cleared automatically
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uint32_t to = 0;
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for (to = 0; to < timeout_ms / 10; to++) {
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MAC_CHECK(w5500_read(emac, W5500_REG_SOCK_CR(0), &command, sizeof(command)) == ESP_OK, "read SCR failed", err, ESP_FAIL);
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if (!command) {
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break;
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}
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vTaskDelay(pdMS_TO_TICKS(10));
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}
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MAC_CHECK(to < timeout_ms / 10, "send command timeout", err, ESP_ERR_TIMEOUT);
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err:
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return ret;
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}
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static esp_err_t w5500_get_tx_free_size(emac_w5500_t *emac, uint16_t *size)
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{
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esp_err_t ret = ESP_OK;
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uint16_t free0, free1 = 0;
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// read TX_FSR register more than once, until we get the same value
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// this is a trick because we might be interrupted between reading the high/low part of the TX_FSR register (16 bits in length)
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do {
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MAC_CHECK(w5500_read(emac, W5500_REG_SOCK_TX_FSR(0), &free0, sizeof(free0)) == ESP_OK, "read TX FSR failed", err, ESP_FAIL);
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MAC_CHECK(w5500_read(emac, W5500_REG_SOCK_TX_FSR(0), &free1, sizeof(free1)) == ESP_OK, "read TX FSR failed", err, ESP_FAIL);
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} while (free0 != free1);
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*size = __builtin_bswap16(free0);
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err:
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return ret;
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}
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static esp_err_t w5500_get_rx_received_size(emac_w5500_t *emac, uint16_t *size)
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{
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esp_err_t ret = ESP_OK;
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uint16_t received0, received1 = 0;
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do {
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MAC_CHECK(w5500_read(emac, W5500_REG_SOCK_RX_RSR(0), &received0, sizeof(received0)) == ESP_OK, "read RX RSR failed", err, ESP_FAIL);
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MAC_CHECK(w5500_read(emac, W5500_REG_SOCK_RX_RSR(0), &received1, sizeof(received1)) == ESP_OK, "read RX RSR failed", err, ESP_FAIL);
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} while (received0 != received1);
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*size = __builtin_bswap16(received0);
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err:
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return ret;
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}
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static esp_err_t w5500_write_buffer(emac_w5500_t *emac, const void *buffer, uint32_t len, uint16_t offset)
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{
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esp_err_t ret = ESP_OK;
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uint32_t remain = len;
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const uint8_t *buf = buffer;
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offset %= W5500_TX_MEM_SIZE;
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if (offset + len > W5500_TX_MEM_SIZE) {
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remain = (offset + len) % W5500_TX_MEM_SIZE;
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len = W5500_TX_MEM_SIZE - offset;
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MAC_CHECK(w5500_write(emac, W5500_MEM_SOCK_TX(0, offset), buf, len) == ESP_OK, "write TX buffer failed", err, ESP_FAIL);
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offset += len;
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buf += len;
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}
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MAC_CHECK(w5500_write(emac, W5500_MEM_SOCK_TX(0, offset), buf, remain) == ESP_OK, "write TX buffer failed", err, ESP_FAIL);
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err:
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return ret;
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}
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static esp_err_t w5500_read_buffer(emac_w5500_t *emac, void *buffer, uint32_t len, uint16_t offset)
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{
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esp_err_t ret = ESP_OK;
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uint32_t remain = len;
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uint8_t *buf = buffer;
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offset %= W5500_RX_MEM_SIZE;
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if (offset + len > W5500_RX_MEM_SIZE) {
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remain = (offset + len) % W5500_RX_MEM_SIZE;
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len = W5500_RX_MEM_SIZE - offset;
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MAC_CHECK(w5500_read(emac, W5500_MEM_SOCK_RX(0, offset), buf, len) == ESP_OK, "read RX buffer failed", err, ESP_FAIL);
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offset += len;
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buf += len;
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}
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MAC_CHECK(w5500_read(emac, W5500_MEM_SOCK_RX(0, offset), buf, remain) == ESP_OK, "read RX buffer failed", err, ESP_FAIL);
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err:
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return ret;
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}
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static esp_err_t w5500_set_mac_addr(emac_w5500_t *emac)
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{
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esp_err_t ret = ESP_OK;
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MAC_CHECK(w5500_write(emac, W5500_REG_MAC, emac->addr, 6) == ESP_OK, "write MAC address register failed", err, ESP_FAIL);
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err:
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return ret;
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}
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static esp_err_t w5500_reset(emac_w5500_t *emac)
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{
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esp_err_t ret = ESP_OK;
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/* software reset */
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uint8_t mr = W5500_MR_RST; // Set RST bit (auto clear)
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MAC_CHECK(w5500_write(emac, W5500_REG_MR, &mr, sizeof(mr)) == ESP_OK, "write MR failed", err, ESP_FAIL);
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uint32_t to = 0;
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for (to = 0; to < emac->sw_reset_timeout_ms / 10; to++) {
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MAC_CHECK(w5500_read(emac, W5500_REG_MR, &mr, sizeof(mr)) == ESP_OK, "read MR failed", err, ESP_FAIL);
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if (!(mr & W5500_MR_RST)) {
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break;
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}
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vTaskDelay(pdMS_TO_TICKS(10));
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}
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MAC_CHECK(to < emac->sw_reset_timeout_ms / 10, "reset timeout", err, ESP_ERR_TIMEOUT);
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err:
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return ret;
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}
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static esp_err_t w5500_verify_id(emac_w5500_t *emac)
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{
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esp_err_t ret = ESP_OK;
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uint8_t version = 0;
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MAC_CHECK(w5500_read(emac, W5500_REG_VERSIONR, &version, sizeof(version)) == ESP_OK,
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"read VERSIONR failed", err, ESP_FAIL);
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// W5500 doesn't have chip ID, we just print the version number instead
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ESP_LOGI(TAG, "version=%x", version);
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err:
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return ret;
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}
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static esp_err_t w5500_setup_default(emac_w5500_t *emac)
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{
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esp_err_t ret = ESP_OK;
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uint8_t reg_value = 16;
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// Only SOCK0 can be used as MAC RAW mode, so we give the whole buffer (16KB TX and 16KB RX) to SOCK0
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MAC_CHECK(w5500_write(emac, W5500_REG_SOCK_RXBUF_SIZE(0), ®_value, sizeof(reg_value)) == ESP_OK, "set rx buffer size failed", err, ESP_FAIL);
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MAC_CHECK(w5500_write(emac, W5500_REG_SOCK_TXBUF_SIZE(0), ®_value, sizeof(reg_value)) == ESP_OK, "set tx buffer size failed", err, ESP_FAIL);
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reg_value = 0;
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for (int i = 1; i < 8; i++) {
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MAC_CHECK(w5500_write(emac, W5500_REG_SOCK_RXBUF_SIZE(i), ®_value, sizeof(reg_value)) == ESP_OK, "set rx buffer size failed", err, ESP_FAIL);
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MAC_CHECK(w5500_write(emac, W5500_REG_SOCK_TXBUF_SIZE(i), ®_value, sizeof(reg_value)) == ESP_OK, "set tx buffer size failed", err, ESP_FAIL);
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}
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/* Enable ping block, disable PPPoE, WOL */
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reg_value = W5500_MR_PB;
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MAC_CHECK(w5500_write(emac, W5500_REG_MR, ®_value, sizeof(reg_value)) == ESP_OK, "write MR failed", err, ESP_FAIL);
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/* Disable interrupt for all sockets by default */
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reg_value = 0;
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MAC_CHECK(w5500_write(emac, W5500_REG_SIMR, ®_value, sizeof(reg_value)) == ESP_OK, "write SIMR failed", err, ESP_FAIL);
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/* Enable MAC RAW mode for SOCK0, enable MAC filter, no blocking broadcast and multicast */
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reg_value = W5500_SMR_MAC_RAW | W5500_SMR_MAC_FILTER;
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MAC_CHECK(w5500_write(emac, W5500_REG_SOCK_MR(0), ®_value, sizeof(reg_value)) == ESP_OK, "write SMR failed", err, ESP_FAIL);
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/* Enable receive and send event for SOCK0 */
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reg_value = W5500_SIR_RECV | W5500_SIR_SEND;
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MAC_CHECK(w5500_write(emac, W5500_REG_SOCK_IMR(0), ®_value, sizeof(reg_value)) == ESP_OK, "write SOCK0 IMR failed", err, ESP_FAIL);
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err:
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return ret;
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}
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static esp_err_t emac_w5500_start(esp_eth_mac_t *mac)
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{
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esp_err_t ret = ESP_OK;
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emac_w5500_t *emac = __containerof(mac, emac_w5500_t, parent);
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uint8_t reg_value = 0;
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/* open SOCK0 */
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MAC_CHECK(w5500_send_command(emac, W5500_SCR_OPEN, 100) == ESP_OK, "issue OPEN command failed", err, ESP_FAIL);
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/* enable interrupt for SOCK0 */
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reg_value = W5500_SIMR_SOCK0;
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MAC_CHECK(w5500_write(emac, W5500_REG_SIMR, ®_value, sizeof(reg_value)) == ESP_OK, "write SIMR failed", err, ESP_FAIL);
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err:
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return ret;
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}
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static esp_err_t emac_w5500_stop(esp_eth_mac_t *mac)
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{
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esp_err_t ret = ESP_OK;
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emac_w5500_t *emac = __containerof(mac, emac_w5500_t, parent);
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uint8_t reg_value = 0;
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/* disable interrupt */
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MAC_CHECK(w5500_write(emac, W5500_REG_SIMR, ®_value, sizeof(reg_value)) == ESP_OK, "write SIMR failed", err, ESP_FAIL);
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/* close SOCK0 */
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MAC_CHECK(w5500_send_command(emac, W5500_SCR_CLOSE, 100) == ESP_OK, "issue CLOSE command failed", err, ESP_FAIL);
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err:
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return ret;
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}
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IRAM_ATTR static void w5500_isr_handler(void *arg)
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{
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emac_w5500_t *emac = (emac_w5500_t *)arg;
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BaseType_t high_task_wakeup = pdFALSE;
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/* notify w5500 task */
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vTaskNotifyGiveFromISR(emac->rx_task_hdl, &high_task_wakeup);
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if (high_task_wakeup != pdFALSE) {
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portYIELD_FROM_ISR();
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}
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}
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static void emac_w5500_task(void *arg)
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{
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emac_w5500_t *emac = (emac_w5500_t *)arg;
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uint8_t status = 0;
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uint8_t *buffer = NULL;
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uint32_t length = 0;
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while (1) {
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// block indefinitely until some task notifies me
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ulTaskNotifyTake(pdTRUE, portMAX_DELAY);
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/* read interrupt status */
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w5500_read(emac, W5500_REG_SOCK_IR(0), &status, sizeof(status));
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/* packet received */
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if (status & W5500_SIR_RECV) {
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status = W5500_SIR_RECV;
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// clear interrupt status
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w5500_write(emac, W5500_REG_SOCK_IR(0), &status, sizeof(status));
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do {
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length = ETH_MAX_PACKET_SIZE;
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buffer = heap_caps_malloc(length, MALLOC_CAP_DMA);
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if (!buffer) {
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ESP_LOGE(TAG, "no mem for receive buffer");
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break;
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} else if (emac->parent.receive(&emac->parent, buffer, &length) == ESP_OK) {
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/* pass the buffer to stack (e.g. TCP/IP layer) */
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if (length) {
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emac->eth->stack_input(emac->eth, buffer, length);
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} else {
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free(buffer);
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}
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} else {
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free(buffer);
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}
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} while (emac->packets_remain);
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}
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}
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vTaskDelete(NULL);
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}
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static esp_err_t emac_w5500_set_mediator(esp_eth_mac_t *mac, esp_eth_mediator_t *eth)
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{
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esp_err_t ret = ESP_OK;
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MAC_CHECK(eth, "can't set mac's mediator to null", err, ESP_ERR_INVALID_ARG);
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emac_w5500_t *emac = __containerof(mac, emac_w5500_t, parent);
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emac->eth = eth;
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return ESP_OK;
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err:
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return ret;
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}
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static esp_err_t emac_w5500_write_phy_reg(esp_eth_mac_t *mac, uint32_t phy_addr, uint32_t phy_reg, uint32_t reg_value)
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{
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esp_err_t ret = ESP_OK;
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emac_w5500_t *emac = __containerof(mac, emac_w5500_t, parent);
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// PHY register and MAC registers are mixed together in W5500
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// The only PHY register is PHYCFGR
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MAC_CHECK(phy_reg == W5500_REG_PHYCFGR, "wrong PHY register", err, ESP_FAIL);
|
||||
MAC_CHECK(w5500_write(emac, W5500_REG_PHYCFGR, ®_value, sizeof(uint8_t)) == ESP_OK, "write PHY register failed", err, ESP_FAIL);
|
||||
|
||||
err:
|
||||
return ret;
|
||||
}
|
||||
|
||||
static esp_err_t emac_w5500_read_phy_reg(esp_eth_mac_t *mac, uint32_t phy_addr, uint32_t phy_reg, uint32_t *reg_value)
|
||||
{
|
||||
esp_err_t ret = ESP_OK;
|
||||
MAC_CHECK(reg_value, "can't set reg_value to null", err, ESP_ERR_INVALID_ARG);
|
||||
emac_w5500_t *emac = __containerof(mac, emac_w5500_t, parent);
|
||||
// PHY register and MAC registers are mixed together in W5500
|
||||
// The only PHY register is PHYCFGR
|
||||
MAC_CHECK(phy_reg == W5500_REG_PHYCFGR, "wrong PHY register", err, ESP_FAIL);
|
||||
MAC_CHECK(w5500_read(emac, W5500_REG_PHYCFGR, reg_value, sizeof(uint8_t)) == ESP_OK, "read PHY register failed", err, ESP_FAIL);
|
||||
|
||||
err:
|
||||
return ret;
|
||||
}
|
||||
|
||||
static esp_err_t emac_w5500_set_addr(esp_eth_mac_t *mac, uint8_t *addr)
|
||||
{
|
||||
esp_err_t ret = ESP_OK;
|
||||
MAC_CHECK(addr, "invalid argument", err, ESP_ERR_INVALID_ARG);
|
||||
emac_w5500_t *emac = __containerof(mac, emac_w5500_t, parent);
|
||||
memcpy(emac->addr, addr, 6);
|
||||
MAC_CHECK(w5500_set_mac_addr(emac) == ESP_OK, "set mac address failed", err, ESP_FAIL);
|
||||
|
||||
err:
|
||||
return ret;
|
||||
}
|
||||
|
||||
static esp_err_t emac_w5500_get_addr(esp_eth_mac_t *mac, uint8_t *addr)
|
||||
{
|
||||
esp_err_t ret = ESP_OK;
|
||||
MAC_CHECK(addr, "invalid argument", err, ESP_ERR_INVALID_ARG);
|
||||
emac_w5500_t *emac = __containerof(mac, emac_w5500_t, parent);
|
||||
memcpy(addr, emac->addr, 6);
|
||||
|
||||
err:
|
||||
return ret;
|
||||
}
|
||||
|
||||
static esp_err_t emac_w5500_set_link(esp_eth_mac_t *mac, eth_link_t link)
|
||||
{
|
||||
esp_err_t ret = ESP_OK;
|
||||
switch (link) {
|
||||
case ETH_LINK_UP:
|
||||
ESP_LOGD(TAG, "link is up");
|
||||
MAC_CHECK(mac->start(mac) == ESP_OK, "w5500 start failed", err, ESP_FAIL);
|
||||
break;
|
||||
case ETH_LINK_DOWN:
|
||||
ESP_LOGD(TAG, "link is down");
|
||||
MAC_CHECK(mac->stop(mac) == ESP_OK, "w5500 stop failed", err, ESP_FAIL);
|
||||
break;
|
||||
default:
|
||||
MAC_CHECK(false, "unknown link status", err, ESP_ERR_INVALID_ARG);
|
||||
break;
|
||||
}
|
||||
|
||||
err:
|
||||
return ret;
|
||||
}
|
||||
|
||||
static esp_err_t emac_w5500_set_speed(esp_eth_mac_t *mac, eth_speed_t speed)
|
||||
{
|
||||
esp_err_t ret = ESP_OK;
|
||||
switch (speed) {
|
||||
case ETH_SPEED_10M:
|
||||
ESP_LOGD(TAG, "working in 10Mbps");
|
||||
break;
|
||||
case ETH_SPEED_100M:
|
||||
ESP_LOGD(TAG, "working in 100Mbps");
|
||||
break;
|
||||
default:
|
||||
MAC_CHECK(false, "unknown speed", err, ESP_ERR_INVALID_ARG);
|
||||
break;
|
||||
}
|
||||
|
||||
err:
|
||||
return ret;
|
||||
}
|
||||
|
||||
static esp_err_t emac_w5500_set_duplex(esp_eth_mac_t *mac, eth_duplex_t duplex)
|
||||
{
|
||||
esp_err_t ret = ESP_OK;
|
||||
switch (duplex) {
|
||||
case ETH_DUPLEX_HALF:
|
||||
ESP_LOGD(TAG, "working in half duplex");
|
||||
break;
|
||||
case ETH_DUPLEX_FULL:
|
||||
ESP_LOGD(TAG, "working in full duplex");
|
||||
break;
|
||||
default:
|
||||
MAC_CHECK(false, "unknown duplex", err, ESP_ERR_INVALID_ARG);
|
||||
break;
|
||||
}
|
||||
|
||||
err:
|
||||
return ret;
|
||||
}
|
||||
|
||||
static esp_err_t emac_w5500_set_promiscuous(esp_eth_mac_t *mac, bool enable)
|
||||
{
|
||||
esp_err_t ret = ESP_OK;
|
||||
emac_w5500_t *emac = __containerof(mac, emac_w5500_t, parent);
|
||||
uint8_t smr = 0;
|
||||
MAC_CHECK(w5500_read(emac, W5500_REG_SOCK_MR(0), &smr, sizeof(smr)) == ESP_OK, "read SMR failed", err, ESP_FAIL);
|
||||
if (enable) {
|
||||
smr &= ~W5500_SMR_MAC_FILTER;
|
||||
} else {
|
||||
smr |= W5500_SMR_MAC_FILTER;
|
||||
}
|
||||
MAC_CHECK(w5500_write(emac, W5500_REG_SOCK_MR(0), &smr, sizeof(smr)) == ESP_OK, "write SMR failed", err, ESP_FAIL);
|
||||
|
||||
err:
|
||||
return ret;
|
||||
}
|
||||
|
||||
static esp_err_t emac_w5500_enable_flow_ctrl(esp_eth_mac_t *mac, bool enable)
|
||||
{
|
||||
/* w5500 doesn't support flow control function, so accept any value */
|
||||
return ESP_ERR_NOT_SUPPORTED;
|
||||
}
|
||||
|
||||
static esp_err_t emac_w5500_set_peer_pause_ability(esp_eth_mac_t *mac, uint32_t ability)
|
||||
{
|
||||
/* w5500 doesn't suppport PAUSE function, so accept any value */
|
||||
return ESP_ERR_NOT_SUPPORTED;
|
||||
}
|
||||
|
||||
static inline bool is_w5500_sane_for_rxtx(emac_w5500_t *emac)
|
||||
{
|
||||
uint8_t phycfg;
|
||||
/* phy is ok for rx and tx operations if bits RST and LNK are set (no link down, no reset) */
|
||||
if (w5500_read(emac, W5500_REG_PHYCFGR, &phycfg, 1) == ESP_OK && (phycfg & 0x8001)) {
|
||||
return true;
|
||||
}
|
||||
return false;
|
||||
}
|
||||
|
||||
static esp_err_t emac_w5500_transmit(esp_eth_mac_t *mac, uint8_t *buf, uint32_t length)
|
||||
{
|
||||
esp_err_t ret = ESP_OK;
|
||||
emac_w5500_t *emac = __containerof(mac, emac_w5500_t, parent);
|
||||
uint16_t offset = 0;
|
||||
|
||||
// check if there're free memory to store this packet
|
||||
uint16_t free_size = 0;
|
||||
MAC_CHECK(w5500_get_tx_free_size(emac, &free_size) == ESP_OK, "get free size failed", err, ESP_FAIL);
|
||||
MAC_CHECK(length <= free_size, "free size (%d) < send length (%d)", err, ESP_FAIL, free_size, length);
|
||||
// get current write pointer
|
||||
MAC_CHECK(w5500_read(emac, W5500_REG_SOCK_TX_WR(0), &offset, sizeof(offset)) == ESP_OK, "read TX WR failed", err, ESP_FAIL);
|
||||
offset = __builtin_bswap16(offset);
|
||||
// copy data to tx memory
|
||||
MAC_CHECK(w5500_write_buffer(emac, buf, length, offset) == ESP_OK, "write frame failed", err, ESP_FAIL);
|
||||
// update write pointer
|
||||
offset += length;
|
||||
offset = __builtin_bswap16(offset);
|
||||
MAC_CHECK(w5500_write(emac, W5500_REG_SOCK_TX_WR(0), &offset, sizeof(offset)) == ESP_OK, "write TX WR failed", err, ESP_FAIL);
|
||||
// issue SEND command
|
||||
MAC_CHECK(w5500_send_command(emac, W5500_SCR_SEND, 100) == ESP_OK, "issue SEND command failed", err, ESP_FAIL);
|
||||
|
||||
// pooling the TX done event
|
||||
int retry = 0;
|
||||
uint8_t status = 0;
|
||||
while (!(status & W5500_SIR_SEND)) {
|
||||
MAC_CHECK(w5500_read(emac, W5500_REG_SOCK_IR(0), &status, sizeof(status)) == ESP_OK, "read SOCK0 IR failed", err, ESP_FAIL);
|
||||
if ((retry++ > 3 && !is_w5500_sane_for_rxtx(emac)) || retry > 10) {
|
||||
return ESP_FAIL;
|
||||
}
|
||||
}
|
||||
// clear the event bit
|
||||
status = W5500_SIR_SEND;
|
||||
MAC_CHECK(w5500_write(emac, W5500_REG_SOCK_IR(0), &status, sizeof(status)) == ESP_OK, "write SOCK0 IR failed", err, ESP_FAIL);
|
||||
|
||||
err:
|
||||
return ret;
|
||||
}
|
||||
|
||||
static esp_err_t emac_w5500_receive(esp_eth_mac_t *mac, uint8_t *buf, uint32_t *length)
|
||||
{
|
||||
esp_err_t ret = ESP_OK;
|
||||
emac_w5500_t *emac = __containerof(mac, emac_w5500_t, parent);
|
||||
uint16_t offset = 0;
|
||||
uint16_t rx_len = 0;
|
||||
uint16_t remain_bytes = 0;
|
||||
emac->packets_remain = false;
|
||||
|
||||
w5500_get_rx_received_size(emac, &remain_bytes);
|
||||
if (remain_bytes) {
|
||||
// get current read pointer
|
||||
MAC_CHECK(w5500_read(emac, W5500_REG_SOCK_RX_RD(0), &offset, sizeof(offset)) == ESP_OK, "read RX RD failed", err, ESP_FAIL);
|
||||
offset = __builtin_bswap16(offset);
|
||||
// read head first
|
||||
MAC_CHECK(w5500_read_buffer(emac, &rx_len, sizeof(rx_len), offset) == ESP_OK, "read frame header failed", err, ESP_FAIL);
|
||||
rx_len = __builtin_bswap16(rx_len) - 2; // data size includes 2 bytes of header
|
||||
offset += 2;
|
||||
// read the payload
|
||||
MAC_CHECK(w5500_read_buffer(emac, buf, rx_len, offset) == ESP_OK, "read payload failed, len=%d, offset=%d", err, ESP_FAIL, rx_len, offset);
|
||||
offset += rx_len;
|
||||
// update read pointer
|
||||
offset = __builtin_bswap16(offset);
|
||||
MAC_CHECK(w5500_write(emac, W5500_REG_SOCK_RX_RD(0), &offset, sizeof(offset)) == ESP_OK, "write RX RD failed", err, ESP_FAIL);
|
||||
/* issue RECV command */
|
||||
MAC_CHECK(w5500_send_command(emac, W5500_SCR_RECV, 100) == ESP_OK, "issue RECV command failed", err, ESP_FAIL);
|
||||
// check if there're more data need to process
|
||||
remain_bytes -= rx_len + 2;
|
||||
emac->packets_remain = remain_bytes > 0;
|
||||
}
|
||||
|
||||
*length = rx_len;
|
||||
err:
|
||||
return ret;
|
||||
}
|
||||
|
||||
static esp_err_t emac_w5500_init(esp_eth_mac_t *mac)
|
||||
{
|
||||
esp_err_t ret = ESP_OK;
|
||||
emac_w5500_t *emac = __containerof(mac, emac_w5500_t, parent);
|
||||
esp_eth_mediator_t *eth = emac->eth;
|
||||
esp_rom_gpio_pad_select_gpio(emac->int_gpio_num);
|
||||
gpio_set_direction(emac->int_gpio_num, GPIO_MODE_INPUT);
|
||||
gpio_set_pull_mode(emac->int_gpio_num, GPIO_PULLUP_ONLY);
|
||||
gpio_set_intr_type(emac->int_gpio_num, GPIO_INTR_NEGEDGE); // active low
|
||||
gpio_intr_enable(emac->int_gpio_num);
|
||||
gpio_isr_handler_add(emac->int_gpio_num, w5500_isr_handler, emac);
|
||||
MAC_CHECK(eth->on_state_changed(eth, ETH_STATE_LLINIT, NULL) == ESP_OK, "lowlevel init failed", err, ESP_FAIL);
|
||||
/* reset w5500 */
|
||||
MAC_CHECK(w5500_reset(emac) == ESP_OK, "reset w5500 failed", err, ESP_FAIL);
|
||||
/* verify chip id */
|
||||
MAC_CHECK(w5500_verify_id(emac) == ESP_OK, "vefiry chip ID failed", err, ESP_FAIL);
|
||||
/* default setup of internal registers */
|
||||
MAC_CHECK(w5500_setup_default(emac) == ESP_OK, "w5500 default setup failed", err, ESP_FAIL);
|
||||
return ESP_OK;
|
||||
err:
|
||||
gpio_isr_handler_remove(emac->int_gpio_num);
|
||||
gpio_reset_pin(emac->int_gpio_num);
|
||||
eth->on_state_changed(eth, ETH_STATE_DEINIT, NULL);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static esp_err_t emac_w5500_deinit(esp_eth_mac_t *mac)
|
||||
{
|
||||
emac_w5500_t *emac = __containerof(mac, emac_w5500_t, parent);
|
||||
esp_eth_mediator_t *eth = emac->eth;
|
||||
mac->stop(mac);
|
||||
gpio_isr_handler_remove(emac->int_gpio_num);
|
||||
gpio_reset_pin(emac->int_gpio_num);
|
||||
eth->on_state_changed(eth, ETH_STATE_DEINIT, NULL);
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
static esp_err_t emac_w5500_del(esp_eth_mac_t *mac)
|
||||
{
|
||||
emac_w5500_t *emac = __containerof(mac, emac_w5500_t, parent);
|
||||
vTaskDelete(emac->rx_task_hdl);
|
||||
vSemaphoreDelete(emac->spi_lock);
|
||||
free(emac);
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
esp_eth_mac_t *esp_eth_mac_new_w5500(const eth_w5500_config_t *w5500_config, const eth_mac_config_t *mac_config)
|
||||
{
|
||||
esp_eth_mac_t *ret = NULL;
|
||||
emac_w5500_t *emac = NULL;
|
||||
MAC_CHECK(w5500_config && mac_config, "invalid argument", err, NULL);
|
||||
emac = calloc(1, sizeof(emac_w5500_t));
|
||||
MAC_CHECK(emac, "no mem for MAC instance", err, NULL);
|
||||
/* w5500 driver is interrupt driven */
|
||||
MAC_CHECK(w5500_config->int_gpio_num >= 0, "invalid interrupt gpio number", err, NULL);
|
||||
/* bind methods and attributes */
|
||||
emac->sw_reset_timeout_ms = mac_config->sw_reset_timeout_ms;
|
||||
emac->int_gpio_num = w5500_config->int_gpio_num;
|
||||
emac->spi_hdl = w5500_config->spi_hdl;
|
||||
emac->parent.set_mediator = emac_w5500_set_mediator;
|
||||
emac->parent.init = emac_w5500_init;
|
||||
emac->parent.deinit = emac_w5500_deinit;
|
||||
emac->parent.start = emac_w5500_start;
|
||||
emac->parent.stop = emac_w5500_stop;
|
||||
emac->parent.del = emac_w5500_del;
|
||||
emac->parent.write_phy_reg = emac_w5500_write_phy_reg;
|
||||
emac->parent.read_phy_reg = emac_w5500_read_phy_reg;
|
||||
emac->parent.set_addr = emac_w5500_set_addr;
|
||||
emac->parent.get_addr = emac_w5500_get_addr;
|
||||
emac->parent.set_speed = emac_w5500_set_speed;
|
||||
emac->parent.set_duplex = emac_w5500_set_duplex;
|
||||
emac->parent.set_link = emac_w5500_set_link;
|
||||
emac->parent.set_promiscuous = emac_w5500_set_promiscuous;
|
||||
emac->parent.set_peer_pause_ability = emac_w5500_set_peer_pause_ability;
|
||||
emac->parent.enable_flow_ctrl = emac_w5500_enable_flow_ctrl;
|
||||
emac->parent.transmit = emac_w5500_transmit;
|
||||
emac->parent.receive = emac_w5500_receive;
|
||||
/* create mutex */
|
||||
emac->spi_lock = xSemaphoreCreateMutex();
|
||||
MAC_CHECK(emac->spi_lock, "create lock failed", err, NULL);
|
||||
/* create w5500 task */
|
||||
BaseType_t core_num = tskNO_AFFINITY;
|
||||
if (mac_config->flags & ETH_MAC_FLAG_PIN_TO_CORE) {
|
||||
core_num = cpu_hal_get_core_id();
|
||||
}
|
||||
BaseType_t xReturned = xTaskCreatePinnedToCore(emac_w5500_task, "w5500_tsk", mac_config->rx_task_stack_size, emac,
|
||||
mac_config->rx_task_prio, &emac->rx_task_hdl, core_num);
|
||||
MAC_CHECK(xReturned == pdPASS, "create w5500 task failed", err, NULL);
|
||||
return &(emac->parent);
|
||||
|
||||
err:
|
||||
if (emac) {
|
||||
if (emac->rx_task_hdl) {
|
||||
vTaskDelete(emac->rx_task_hdl);
|
||||
}
|
||||
if (emac->spi_lock) {
|
||||
vSemaphoreDelete(emac->spi_lock);
|
||||
}
|
||||
free(emac);
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
Loading…
Reference in New Issue